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Posted by timhh 3 days ago

Baochip-1x: What it is, why I'm doing it now and how it came about(www.crowdsupply.com)
232 points | 30 commentspage 2
gzread 8 hours ago|
This is about transparency just like the Precursor, right? How can I know that my Baochip-1x is really what it says it is?
bunnie 7 hours ago|
The Baochip is packaged in a form of package that is inspectable using IRIS. [1] It does not give perfect verification but it's the best I can offer until we have more open PDKs.

[1] https://bunnie.org/iris

K0balt 9 hours ago||
Very cool! So there’s 5x riscV cores available?
bunnie 9 hours ago|
Yes, 1x Vexriscv RV32-IMAC + MMU, and 4x PicoRV32's as RV32E-MC for I/O processing, configured with extensions to enable deterministic, real-time bit-banging without having to count clocks.
alex7o 7 hours ago|||
That reminds me a lot of the xmos xcore mcus with 8 cores. I am curious what kind of synchronization primitives have you added and why?
bunnie 7 hours ago|||
I'm actually working on a comprehensive write up on exactly this topic that should be out sometime next week!
K0balt 7 hours ago||
Just ordered 2 to play with!
cmrdporcupine 4 hours ago|||
Sounds like the Parallax Propeller 1/2 as well.

It's a good model for MCU stuff. There were people pushing Chip Gracey (Parallax) to use RISC-V instead of his custom ISA when he designed the P2 a few years ago, but he chose to do his own thing. Which has made compiler development difficult.

K0balt 2 hours ago||
This seems more on the RPI side rather than propeller, propeller was never a really good choice for production integration. This looks like it could hold its own in many contexts.
K0balt 7 hours ago|||
Nice! I love the specialized io processors. Fantastic work!
intrasight 7 hours ago||
I didn't know there were partially open source RISC-V. I might have missed it in the article, but what was the reason for having some parts closed source?
theParadox42 5 hours ago|
It’s not the RISC-V core itself, it’s just some of the surrounding architecture to support the CPU, to turn it into a SOC. So the USB drivers, the AXI memory interfaces, and the analog components, like PLLs for generating clocks, or even the IO pad drivers. These components take the fully open RISC-V core which works in a simulator and makes it work like a normal physical chip would.
arj 5 hours ago||
It seems it had hardware support for secure mesh. Anyone know what that is?
crote 1 hour ago|
With the right equipment it is possible to probe the inside of a chip, allowing an attacker to measure or even alter internal signals down to the transistor level. Expensive, but very useful if it lets you extract a crucial shared secret.

The traditional defense against this kind of invasive attack is to put a grid of sense wires on the outermost metal layer, and measuring whether it has been tampered with: you can't get to the important bits without cutting through the security grid, but any kind of modification to the security grid triggers a self-destruct.

Dani99 4 hours ago|
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